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OKI Semiconductor ML9208-xx
5 x 7 Dot Character x 16-Digit Display Controller/Driver with Character RAM
FEDL9208-01
Issue Date: Feb. 23, 2004
GENERAL DESCRIPTION
The ML9208-xx is a dot matrix vacuum fluorescent display tube controller driver IC which displays characters, numerics and symbols. Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from a micro-controller. A display system is easily realized by internal ROM and RAM for character display.
FEATURES
* Logic power supply and vacuum fluorescent display tube drive power supply (VDD) : 3.3 V 10% or 5.0 V 10% * Fluorescent display tube drive power supply (VFL) : VDD -20 V to VDD -42 V * VFD driver output current (VFD driver output can be connected directly to the fluorescent display tube. No pull-down resistor is required.) - Segment driver (SEG1 to SEG35) : -6 mA (VFL = VDD -42 V) - Segment driver (AD1 and AD2) : -15 mA (VFL = VDD -42 V) - Grid driver (COM1 to COM16) : -30 mA (VFL = VDD -42 V) * General output port output current - Output driver (P1 and P2) : 1 mA (VDD = 3.3 V 10%) 2 mA (VDD = 5.0 V 10%) * Content of display - CGROM 5 x 7 dots : 248 types (character data) - CGRAM 5 x 7 dots : 8 types (character data) - ADRAM 16 (display digit) x 2 bits (symbol data) - DCRAM 16 (display digit) x 8 bits (register for character data display) - General output port 2 bits (static operation) * Display control function - Display digit : 9 to 16 digits - Display duty (contrast adjustment) : 8 stages - All lights ON/OFFs * 3 interfaces with microcontroller : DA, CS, CP (4 interfaces when RESET is added) * 1-byte instruction execution (excluding data write to RAM) * Built-in oscillation circuit (external R and C) * Package options: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (ML9208-xxGA) 64-pin plastic SSOP (SSOP64-P-525-0.80-K) (ML9208-XXMB)
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BLOCK DIAGRAM
VDD GND VFL DCRAM 16w x 8b CGROM 248w x 35b Segment Driver RESET DA CP CS 8 bit Shift Register CGRAM 8w x 35b SEG35 AD1 AD Driver AD2 SEG1
ADRAM 16w x 2b
Address Selector Command Decoder Control Circuit Write Address Counter Read Address Counter
P1 Port Driver P2
Digit Control Duty Control
Timing Generator 1 Timing Generator 2
COM1 Grid Driver COM16
OSC0 Oscillator OSC1
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PIN CONFIGURATION (TOP VIEW)
52 RESET 51 OSC1 50 OSC0
64 SEG4
63 SEG3 62 SEG2
61 SEG1
SEG5 1 SEG6 2 SEG7 3 SEG8 4 SEG9 5 SEG10 6 SEG11 7 SEG12 8 SEG13 9 SEG14 10 SEG15 11 SEG16 12 SEG17 13 SEG18 14 SEG19 15 SEG20 16 SEG21 17 SEG22 18 SEG23 19 SEG24 20 SEG25 21 SEG26 22 SEG27 23 SEG28 24 SEG29 25 SEG30 26 SEG31 27 SEG32 28 SEG33 29 SEG34 30 SEG35 31 COM1 32
49 GND 48 VFL 47 COM16 46 COM15 45 COM14 44 COM13 43 COM12 42 COM11 41 COM10 40 COM9 39 COM8 38 COM7 37 COM6 36 COM5 35 COM4 34 COM3 33 COM2
60 AD1
59 AD2 58 P2
56 VDD 55 DA
54 CP
57 P1
64-Pin Plastic QFP
53
CS
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P1 P2 AD2 AD1 SEG1 SEG2 SEG3 SEG4 SEG5
1 2 3 4 5 6 7 8 9
64 VDD 63 62 61 DA CP
CS 60 RESET 59 OSC1 58 OSC0 57 GND 56 VFL 55 COM16 54 COM15 53 COM14 52 COM13 51 COM12 50 COM11 49 COM10 48 COM9 47 COM8 46 COM7 45 COM6 44 COM5 43 COM4 42 COM3 41 COM2 40 COM1 39 SEG35 38 SEG34 37 SEG33 36 SEG32 35 SEG31 34 SEG30 33 SEG29
SEG6 10 SEG7 11 SEG8 12 SEG9 13 SEG10 14 SEG11 15 SEG12 16 SEG13 17 SEG14 18 SEG15 19 SEG16 20 SEG17 21 SEG18 22 SEG19 23 SEG20 24 SEG21 25 SEG22 26 SEG23 27 SEG24 28 SEG25 29 SEG26 30 SEG27 31 SEG28 32
64-Pin Plastic SSOP
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PIN DESCRIPTION
Pin QFP 1 to 31, 61 to 64 SSOP Symbol Type Connects to Fluorescent tube anode electrode Fluorescent tube grid electrode Fluorescent tube anode electrode LED drive control pins Description Fluorescent display tube anode electrode drive output. Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > -6 mA Fluorescent display tube grid electrode drive output. Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > -30 mA Fluorescent display tube anode electrode drive output. Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > -15 mA General port output. Output of these pins in static operation, so these pins can drive the LED. VDD-GND are power supplies for internal logic. -- Power supply VDD-VFL are power supplies for driving fluorescent tubes. Apply VFL after VDD is applied. Serial data input (positive logic). Input from LSB. Shift clock input. Serial data is shifted on the rising edge of CP. Chip select input. Serial data transfer is disabled when CS pin is "H" level. Reset input. "Low" initializes all the functions. Initial status is as follows. * Address of each RAM address "00"H * Data of each RAM Content is undefined 52 60 RESET I * Display digit 16 digits Microcontroller * Contrast adjustment 8/16 or C2, R2 * All lights ON or OFF OFF mode * All outputs "Low" level
RESET
5 to 39 SEG1 to 35
O
32 to 47 40 to 55 COM1 to 16
O
59, 60
3, 4
AD1, AD2
O
57, 58 56 49 48 55 54 53
1, 2 64 57 56 63 62 61
P1, P2 VDD GND VFL DA CP CS
O
I I I
Microcontroller Microcontroller Microcontroller
(Circuit when R and C are connected externally)
C2 R2
See Application Circuit.
External RC pin for RC oscillation. 50 58 OSC0 I C1, R1 OSC0 51 59 OSC1 O OSC1 R1 (RC oscillation circuit) C1 See Application Circuit. Connect R and C externally. The RC time constant depends on the VDD voltage used. Set the target oscillation frequency to 2 MHz.
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ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage (1) Supply Voltage (2) Input Voltage Power Dissipation Storage Temperature Symbol VDD VFL VIN PD TSTG IO1 Output Current IO2 IO3 IO4 Ta 25C -- COM1 to 16 AD1, AD2 SEG1 to 35 P1, P2 Condition -- -- -- QFP SSOP Rating -0.3 to 6.5 -45 to VDD +0.3 -0.3 to VDD +0.3 541 590 -55 to 150 -40 to 0.0 -20 to 0.0 -10 to 0.0 -4.0 to 4.0 Unit V V V mW C mA mA mA mA
RECOMMENDED OPERATING CONDITIONS-1
When the power supply voltage is 5 V (typ.)
Parameter Supply Voltage (1) Supply Voltage (2) High Level Input Voltage Low Level Input Voltage CP Frequency Oscillation Frequency Frame Frequency Operating Temperature Symbol VDD VFL VIH VIL fC fOSC fFR Top Condition -- -- All input pins excluding OSC0 pin All input pins excluding OSC0 pin -- R1 = 3.3 k, C1 = 39 pF DIGIT = 1 to 16, R1 = 3.3 k, C1 = 39 pF -- Min. 4.5 -36.5 0.7 VDD -- -- 1.5 183 -40 Typ. 5.0 -- -- -- -- 2.0 244 -- Max. 5.5 -20 -- 0.3 VDD 2.0 2.5 305 85 Unit V V V V MHz MHz Hz C
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RECOMMENDED OPERATING CONDITIONS-2
When the power supply voltage is 3.3 V (typ.)
Parameter Supply Voltage (1) Supply Voltage (2) High Level Input Voltage Low Level Input Voltage CP Frequency Oscillation Frequency Frame Frequency Operating Temperature Symbol VDD VFL VIH VIL fC fOSC fFR Top Condition -- -- All input pins excluding OSC0 pin All input pins excluding OSC0 pin -- R1 = 3.3 k, C1 = 39 pF DIGIT = 1 to 16, R1 = 3.3 k, C1 = 39 pF -- Min. 3.0 -38.4 0.8 VDD -- -- 1.5 183 -40 Typ. 3.3 -- -- -- -- 2.0 244 -- Max. 3.6 -20 -- 0.2 VDD 2.0 2.5 305 85 Unit V V V V MHz MHz Hz C
ELECTRICAL CHARACTERISTICS
DC Characteristics-1
(VDD = 5.0 V 10%, VFL = VDD -42 V, Ta = -40 to +85C, unless otherwise specified) Parameter High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Symbol VIH VIL IIH IIL VOH1 High Level Output Voltage VOH2 VOH3 VOH4 VOL1 VOL2 IDD1 Current Consumption IDD2 VDD Applied pin CS, CP, DA, RESET CS, CP, DA, RESET CS, CP, DA, RESET CS, CP, DA, RESET COM1 to 16 AD1, AD2 SEG1 to 35 P1, P2 COM1 to 16 AD1, AD2 SEG1 to 35 P1, P2 Condition -- -- VIH = VDD VIL = 0.0 V IOH1 = -30 mA IOH2 = -15 mA IOH3 = -6 mA IOH4 = -2 mA -- IOL1 = 2 mA Duty = 15/16 fOSC = 2 MHz, no load Digit = 1 to 16 All output lights ON Duty = 8/16 Digit = 1 to 9 All output lights OFF -- 3 mA -- 4 mA Min. 0.7 VDD -- -1.0 -1.0 VDD -1.5 VDD -1.5 VDD -1.5 VDD -1.0 -- -- Max. -- 0.3 VDD 1.0 1.0 -- -- -- -- VFL +1.0 1.0 Unit V V A A V V V V V V
Low Level Output Voltage
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DC Characteristics-2
(VDD = 3.3 V 10%, VFL = VDD -42 V, Ta = -40 to +85C, unless otherwise specified) Parameter High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Symbol VIH VIL IIH IIL VOH1 High Level Output Voltage VOH2 VOH3 VOH4 VOL1 VOL2 IDD1 Current Consumption IDD2 VDD Applied pin CS, CP, DA, RESET CS, CP, DA, RESET CS, CP, DA, RESET CS, CP, DA, RESET COM1 to 16 AD1, AD2 SEG1 to 35 P1, P2 COM1 to 16 AD1, AD2 SEG1 to 35 P1, P2 Condition -- -- VIH = VDD VIL = 0.0 V IOH1 = -30 mA IOH2 = -15 mA IOH3 = -6 mA IOH4 = -1 mA -- IOL1 = 1 mA Duty = 15/16 FOSC = 2 MHz, no load Digit = 1 to 16 All output lights ON Duty = 8/16 Digit = 1 to 9 All output lights OFF -- 2 mA -- 3 mA Min. 0.8 VDD -- -1.0 -1.0 VDD -1.5 VDD -1.5 VDD -1.5 VDD -1.0 -- -- Max. -- 0.2 VDD 1.0 1.0 -- -- -- -- VFL +1.0 1.0 Unit V V A A V V V V V V
Low Level Output Voltage
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AC Characteristics-1
(VDD = 5.0 V 10%, VFL = VDD -42 V, Ta = -40 to +85C, unless otherwise specified) Parameter CP Frequency CP Pulse Width DA Setup Time DA Hold Time CS Setup Time CS Hold Time CS Wait Time Data Processing Time RESET Pulse Width RESET Time DA Wait Time All Output Slew Rate VDD Rise Time VDD Off Time Symbol fC tCW tDS tDH tCSS tCSH tCSW tDOFF tWRES Condition -- -- -- -- -- R1 = 3.3 k, C1 = 47 pF -- R1 = 3.3 k, C1 = 47 pF When RESET signal is input from microcontroller etc. externally When RESET signal is input from microcontroller etc. externally R2 = 1.0 k, C2 = 0.1 F tRSOFF tR tF tPRZ tPOF Cl = 100 pF -- tR = 20 to 80% tF = 80 to 20% Min. -- 250 250 250 250 16 250 8 250 250 -- 250 -- -- -- 5.0 Max. 2.0 -- -- -- -- -- -- -- -- -- 200 -- 2.0 2.0 100 -- Unit MHz ns ns ns ns s ns s ns ns s ns s s s ms
tRSON
When mounted in the unit When mounted in the unit, VDD = 0.0 V
AC Characteristics-2
(VDD = 3.3 V 10%, VFL = VDD -42 V, Ta = -40 to +85C, unless otherwise specified) Parameter CP Frequency CP Pulse Width DA Setup Time DA Hold Time CS Setup Time CS Hold Time CS Wait Time Data Processing Time RESET Pulse Width RESET Time DA Wait Time All Output Slew Rate VDD Rise Time VDD Off Time Symbol fC tCW tDS tDH tCSS tCSH tCSW tDOFF tWRES Condition -- -- -- -- -- R1 = 3.3 k, C1 = 39 pF -- R1 = 3.3 k, C1 = 39 pF When RESET signal is input from microcontroller etc. externally When RESET signal is input from microcontroller etc. externally R2 = 1.0 k, C2 = 0.1 F tRSOFF tR tF tPRZ tPOF Cl = 100 pF -- tR = 20 to 80% tF = 80 to 20% Min. -- 250 250 250 250 16 250 8 250 250 -- 250 -- -- -- 5.0 Max. 2.0 -- -- -- -- -- -- -- -- -- 200 -- 2.0 2.0 100 -- Unit MHz ns ns ns ns s ns s ns ns s ns s s s ms
tRSON
When mounted in the unit When mounted in the unit, VDD = 0.0 V
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TIMING DIAGRAM
Symbol VIH VIL VDD = 3.3 V 10% 0.8 VDD 0.2 VDD VDD = 5.0 V 10% 0.7 VDD 0.3 VDD
* Data Timing
CS tCSS fC CP tDS DA VALID VALID tDOFF tDH VALID VALID VIH VIL tCW tCW tCSH VIH VIL tCSW VIH VIL
* Reset Timing
VDD RESET DA tPRZ tRSON tRSOFF tRSOFF
When external R and C are connected
When input externally
0.8 VDD 0.0 V VIH 0.5 VDD VIL VIH VIL
tPOF tWRES =
* Output Timing
All outputs tR tF 0.8 VDD 0.2 VFL
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* Digit Output Timing (for 16-digit display, at a duty of 15/16)
T = 8/fOSC
Frame cycle t1 = 1024T (t1= 4.096 ms when fosc = 2.0 MHz) Display timing t2 = 60T (t2 = 240 s when fosc = 2.0 MHz) Blank timing t3 = 4T (t3 = 16 s when fosc = 2.0 MHz)
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 AD1, 2 SEG1-35
VDD VFL
VDD VFL
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FUNCTIONAL DESCRIPTION
Commands List
Command 1 DCRAM data write
LSB
1st byte 1 0 0
MSB LSB
2nd byte
MSB
B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7 X0 X1 X2 X3 0 C0 C1 C2 C3 C4 C5 C6 C7 C0 C5 C10 C15 C20 C25 C30 * C1 C6 C11 C16 C21 C26 C31 * 2 CGRAM data write X0 X1 X2 * 0 1 0 0 C2 C7 C12 C17 C22 C27 C32 * C3 C8 C13 C18 C23 C28 C33 * C4 C9 C14 C19 C24 C29 C34 * 3 ADRAM data write 5 Display duty set 6 Number of digits set 7 All lights ON/OFF Test mode X0 X1 X2 X3 * * * * * D0 D1 D2 K0 K1 K2 L H * 1 0 1 0 1 1 0 0 1 1 0 1 1 1 1 0 0 0 0 0 C0 C1 * * * * * * 4 General output port set P1 P2 2nd byte 3rd byte 4th byte 5th byte 6th byte
*: Don't care Xn: Address specification for each RAM Cn: Character code specification for each RAM Pn: General output port status specification Dn: Display duty specification Kn: Number of digits specification H: All lights ON instruction L: All lights OFF instruction
When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously, addresses are internally incremented automatically. Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes. Note: The test mode is used for inspection before shipment. It is not a user function.
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Positional Relationship Between SEGn and ADn (one digit)
C0 AD1 C1 AD2
SEG1 SEG6
ADRAM written data. Corresponds to 2nd byte
SEG4 SEG9
C0 C5
SEG2 SEG7
C1 C6
SEG3 SEG8
C2 C7
C3 C8
SEG5 SEG10
C4 C9
SEG11 SEG12 SEG13 SEG14 SEG15
C10 C15 C20 C25 C30
C11
C12 C17 C22 C27 C32
C13 C18 C23 C28 C33
C14 C19 C24 C29 C34
C16 C21 C26 C31
SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35
CGRAM written data. Corresponds to 2nd byte CGRAM written data. Corresponds to 3rd byte CGRAM written data. Corresponds to 4th byte
CGRAM written data. Corresponds to 6th byte CGRAM written data. Corresponds to 5th byte
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Data Transfer Method and Command Write Method Display control command and data are written by an 8-bit serial transfer. Write timing is shown in the figure below. Setting the CS pin to "Low" level enables a data transfer. Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first). As shown in the figure below, data is read by the shift register at the rising edge of the shift clock, which is input into the CP pin. If 8-bit data is input, internal load signals are automatically generated and data is written to each register and RAM. Therefore it is not necessary to input load signals from the outside. Setting the CS pin to "High" disables data transfer. Data input from the point when the CS pin changes from "High" to "Low" is recognized in 8-bit units.
CS CP tDOFF tCSH
DA
B0 B1 B2 B3 B4 B5 B6 B7 LSB 1st byte MSB
B0 B1 B2 B3 B4 B5 B6 B7 LSB 2nd byte MSB
B0 B1 B2 B3 B4 B5 B6 B7 LSB 2nd byte MSB
When data is written to DCRAM*
Command and address data
Character code data
Character code data of the next address
* When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are internally incremented automatically. Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes.
Reset Function Reset is executed when the RESET pin is set to "L", (when turning power on, for example) and initializes all functions. Initial status is as follows. * Address of each RAM address "00"H * Data of each RAM All contents are undefined * General output port All general output ports go "Low" * Display digit 16 digits * Contrast adjustment 8/16 * All display lights ON or OFF OFF mode * Segment output All segment outputs go "Low" * AD output All AD outputs go "Low" Please set again according to "Setting Flowchart" after reset.
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Description of Commands and Functions 1. DCRAM data write (Specifies the address of DCRAM and writes the character code of CGROM and CGRAM.) DCRAM (Data Control RAM) has a 4-bit address to store character code of CGROM and CGRAM. The character code specified by DCRAM is converted to a 5 x 7 dot matrix character pattern via CGROM or CGRAM. (The DCRAM can store 16 characters.) [Command format]
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7 1st byte (1st) X0 X1 X2 X3
LSB
1
0
0
0
MSB
: selects DCRAM data write mode and specifies DCRAM address (Ex: Specifies DCRAM address 0H) : specifies character code of CGROM and CGRAM (written into DCRAM address 0H)
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (2nd) C0 C1 C2 C3 C4 C5 C6 C7
To specify the character code of CGROM and CGRAM continuously to the next address, specify only character code as follows. The addresses of DCRAM are automatically incremented. Specification of an address is unnecessary.
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LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (3rd) C0 C1 C2 C3 C4 C5 C6 C7
LSB MSB
: specifies character code of CGROM and CGRAM (written into DCRAM address 1H)
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (4th) C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM (written into DCRAM address 2H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (17th) C0 C1 C2 C3 C4 C5 C6 C7
LSB MSB
: specifies character code of CGROM and CGRAM (written into DCRAM address FH)
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (18th) C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM (DCRAM address 0H is rewritten)
X0 (LSB) to X3 (MSB) : DCRAM addresses (4 bits: 16 characters) C0 (LSB) to C7 (MSB) : Character code of CGROM and CGRAM (8 bits: 256 characters)
[COM positions and set DCRAM addresses]
HEX 0 1 2 3 4 5 6 7 8 9 A B C D E F X0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X2 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 1 X3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 COM position COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
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2. CGRAM data write (Specifies the addresses of CGRAM and writes character pattern data.) CGRAM (Character Generator RAM) has a 3-bit address to store 5 x 7 dot matrix character patterns. A character pattern stored in CGRAM can be displayed by specifying the character code (address) by DCRAM. The address of CGRAM is assigned to 00H to 07H. (All the other addresses are the CGROM addresses.) (The CGRAM can store 8 types of character patterns.) [Command format]
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7 1st byte (1st) X0 X1 X2
LSB
*
0
1
0
0
MSB
: selects CGRAM data write mode and specifies CGRAM address. (Ex: specifies CGRAM address 00H) : specifies 1st column data (rewritten into CGRAM address 00H)
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (2nd) C0 C5 C10 C15 C20 C25 C30
LSB
*
MSB
B0 B1 B2 B3 B4 B5 B6 B7 3rd byte (3rd) C1 C6 C11 C16 C21 C26 C31
LSB
*
MSB
: specifies 2nd column data (rewritten into CGRAM address 00H)
B0 B1 B2 B3 B4 B5 B6 B7 4th byte (4th) C2 C7 C12 C17 C22 C27 C32
LSB
*
MSB
: specifies 3rd column data (rewritten into CGRAM address 00H)
B0 B1 B2 B3 B4 B5 B6 B7 5th byte (5th) C3 C8 C13 C18 C23 C28 C33
LSB
*
MSB
: specifies 4th column data (rewritten into CGRAM address 00H)
B0 B1 B2 B3 B4 B5 B6 B7 6th byte (6th) C4 C9 C14 C19 C24 C29 C34
*
: specifies 5th column data (rewritten into CGRAM address 00H)
To specify character pattern data continuously to the next address, specify only character pattern data as follows. The addresses of CGRAM are automatically incremented. Specification of an address is therefore unnecessary. The 2nd to 6th byte (character pattern data) are regarded as one data item, so 250 ns is sufficient for tDOFF time between bytes.
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LSB
MSB
2nd byte (7th)
B0 B1 B2 B3 B4 B5 B6 B7 C0 C5 C10 C15 C20 C25 C30 * : specifies 1st column data (rewritten into CGRAM address 01H)
LSB MSB
6th byte (11th)
B0 B1 B2 B3 B4 B5 B6 B7 C4 C9 C14 C19 C24 C29 C34 * : specifies 5th column data (rewritten into CGRAM address 01H) : CGRAM addresses (3 bits: 8 characters) * : Don't care
X0 (LSB) to X2 (MSB)
C0 (LSB) to C34 (MSB) : Character pattern data (35 bits: 35 outputs per digit)
[CGROM addresses and set CGRAM addresses] Refer to ROMCODE table
HEX 00 01 02 03 04 05 06 07 X0 0 1 0 1 0 1 0 1 X1 0 0 1 1 0 0 1 1 X2 0 0 0 0 1 1 1 1 CGROM address RAM00(00000000B) RAM01(00000001B) RAM02(00000010B) RAM03(00000011B) RAM04(00000100B) RAM05(00000101B) RAM06(00000110B) RAM07(00000111B)
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Positional relationship between the output area of CGROM and that of CGRAM
C0 C5 C1 C6 C2 C7 C3 C8 C4 C9
C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 area that corresponds to 2nd byte (1st column) area that corresponds to 3rd byte (2nd column) area that corresponds to 6th byte (5th column) area that corresponds to 5th byte (4th column) area that corresponds to 4th byte (3rd column)
Note: CGROM (Character Generator ROM) has an 8-bit address to generate 5 x 7 dot matrix character patterns. CGRAM can store 248 types of character patterns.
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3. ADRAM data write (specifies address of ADRAM and writes symbol data) ADRAM (Additional Data RAM) has a 2-bit address to store symbol data. Symbol data specified by ADRAM is directly output without CGROM and CGRAM. (The ADRAM can store 2 types of symbol patterns for each digit.) The terminal to which the contents of ADRAM are output can be used as a cursor. [Command format]
LSB MSB
1st byte (1st)
B0 B1 B2 B3 B4 B5 B6 B7 X0 X1 X2 X3 1 1 0 0
LSB MSB
: selects ADRAM data write mode and specifies ADRAM address (Ex: specifies ADRAM address 0H) : sets symbol data (written into ADRAM address 0H)
2nd byte (2nd)
B0 B1 B2 B3 B4 B5 B6 B7 C0 C1 * * * ** *
To specify symbol data continuously to the next address, specify only symbol data as follows. The address of ADRAM is automatically incremented. Specification of addresses is therefore unnecessary.
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (3rd) 2nd byte (4th) C0 C1
LSB
*
*
*
*
*
*
MSB
: sets symbol data (written into ADRAM address 1H) : sets symbol data (written into ADRAM address 2H)
B0 B1 B2 B3 B4 B5 B6 B7 C0 C1
LSB
*
*
*
*
*
*
MSB
B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (17th) 2nd byte (18th) C0 C1
LSB
*
*
*
*
*
*
MSB
: sets symbol data (written into ADRAM address FH) : sets symbol data (ADRAM address 0H is rewritten.)
B0 B1 B2 B3 B4 B5 B6 B7 C0 C1 * * * * * *
X0 (LSB) to X3 (MSB) : ADRAM addresses (4 bits: 16 characters) C0 (LSB) to C1 (MSB) : Symbol data (2 bits: 2-symbol data per digit) * : Don't care
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[COM positions and ADRAM addresses]
HEX 0 1 2 3 4 5 6 7 8 9 A B C D E F X0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X2 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 1 X3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 COM position COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
4. General output port set (specifies the general output port status) The general output port is an output for 2-bit static operation. It is used to control other I/O devices and turn on LED. (static operation) When at the "High" level, this output becomes the VDD voltage, and when at the "Low" level, it becomes the ground potential. Therefore, the fluorescent display tube cannot be driven. [Command format]
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7 1st byte P1 P2 * * 0 0 1 0 : selects a general output port and specifies the output status
P1, P2 : general output port * : don't care
[Set data and set state of general output port]
P1 0 1 0 1 P2 0 0 1 1 Display state of general output port Sets P1 and P2 to low Sets P1 to high and P2 to low Sets P1 to low and P2 to high Sets P1 and P2 to high (The state when power is applied or when RESET is input.)
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5. Display duty set (writes display duty value to duty cycle register) Display duty adjusts contrast in 8 stages using 3-bit data. When power is turned on or when the RESET signal is input, the duty cycle register value is "0". Always execute this instruction before turning the display on, then set a desired duty value. [Command format]
LSB MSB
1st byte
B0 B1 B2 B3 B4 B5 B6 B7 D0 D1 D2 * 1 0 1 0
: selects display duty set mode and sets duty value
D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages) * : don't care
[Relation between setup data and controlled COM duty]
HEX 0 1 2 3 4 5 6 7 D0 0 1 0 1 0 1 0 1 D1 0 0 1 1 0 0 1 1 D2 0 0 0 0 1 1 1 1 COM duty 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 (The state when power is turned on or when RESET signal is input.)
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6. Number of digits set (writes the number of display digits to the display digit register) The number of digits set can display 9 to 16 digits using 3-bit data. When power is turned on or when a RESET signal is input, the number of digit register value is "0". Always execute this instruction to change the number of digits before turning the dispaly on. [Command format]
LSB MSB
1st byte
B0 B1 B2 B3 B4 B5 B6 B7 K0 K1 K2 * 0 1 1 0
: selects the number of digit set mode and specifies the number of digit value
K0 (LSB) to K2 (MSB) : number of digit data (3 bits: 8 digits) * : don't care
[Relation between setup data and controlled COM]
HEX 0 1 2 3 4 5 6 7 K0 0 1 0 1 0 1 0 1 K1 0 0 1 1 0 0 1 1 K2 0 0 0 0 1 1 1 1 Number of digits of COM COM1 to 16 COM1 to 9 COM1 to 10 COM1 to 11 COM1 to 12 COM1 to 13 COM1 to 14 COM1 to 15 (The state when power is turned on or when RESET signal is input.)
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7. All display lights ON/OFF set (turns all dispaly lights ON or OFF) All display lights ON is used primarily for display testing. All display lights OFF is primarily used for display blink and to prevent malfunction when power is turned on. This command cannot control the general output port. [Command format]
LSB MSB
1st byte
B0 B1 B2 B3 B4 B5 B6 B7 LH**1110 L: sets all lights OFF H: sets all lights ON *: Don't care
: selects all display lights ON or OFF mode
[Set data and display state of SEG and AD]
L 0 1 0 1 H 0 0 1 1 Display state of SEG and AD Normal display Sets all outputs to Low Sets all outputs to High Sets all outputs to High (All lights ON mode has priority.) (The state when power is applied or when RESET is input.)
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Setting Flowchart (Power applying included)
Apply VDD
Apply VFL
All display lights OFF
Status of all outputs by RESET signal input
General output port setting
Number of digits setting
Display duty setting Select a RAM to be used
DCRAM Data write mode (with address setting)
Address is automatically incremented
CGRAM Data write mode (with address setting)
Address is automatically incremented
ADRAM Data write mode (with address setting)
Address is automatically incremented
DCRAM Character code DCRAM Is character code write ended?
YES
CGRAM Character code CGRAM Is character code write ended?
YES
ADRAM Character code ADRAM Is character code write ended?
YES
NO
NO
NO
YES
Another RAM to be set?
NO
Releases all display lights
OFF mode
Display operation mode
End
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Power-off Flowchart
Display operation mode
Turn off VFL
Turn off VDD
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APPLICATION CIRCUIT
Heater Transformer 5 x 7-dot matrix fluorescent display tube
ANODE ANODE GRID (SEGMENT) (SEGMENT) (DIGIT) VDD R2 VDD C2 VDD C3 Microcontroller Output Port GND CS CP DA ML9208-01 2 P1, 2 GND VFL OSC0 OSC1 R1 C1 GND ZD NPN Tr GND 2 35 16 RESET VDD AD1, 2 SEG1 to 35 COM1 to 16 VDD
R4 LED
VFL
C4
GND
R3
Notes: 1. The VDD value depends on the power supply voltage of the microcontroller used. Adjust the values of the constants R1, R2, R4, C1, and C2 to the power supply voltage used. 2. The VFL value depends on the fluorescent display tube used. Adjust the values of the constants R3 and ZD to the power supply voltage used.
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Reference data The figure below shows the relationship between the VFL voltage and the output current of each driver. Take care that the total power consumption to be used does not exceed the power dissipation.
VFL Voltage-Output Current of Each Driver (mA) -30 -25 Output Current (mA) -20 -15 -10 -5 0 -17 AD1 and AD2 (Condition: VOH = VDD - 1.5 V) SEG1 to 35 (Condition: VOH = VDD - 1.5 V)
COM1 to 16 (Condition: VOH = VDD - 1.5 V)
-22
-27
-32
-37
-42 (V)
VFL Voltage (VDD - n)
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ML9208-01 ROM CODE
* ROM CODE_A is the character set for SEGA1 to SEGA35. *00000000b(00h) to 00001111b(0Fh) are the CGRAM_A addresses.
MSB 0000 LSB 0000 RAM0 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0001 RAM1
0010 RAM2
0011 RAM3
0100 RAM4
0101 RAM5
0110 RAM6
0111 RAM7
1000
1001
1010
1011
1100
1101
1110
1111
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PACKAGE DIMENSIONS
(Unit: mm)
QFP64-P-1414-0.80-BK
Mirror finish
5
Notes for Mounting the Surface Mount Type Package
Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised
Epoxy resin 42 alloy Solder plating (J5m) 0.87 TYP. 6/Feb. 23, 2001
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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(Unit: mm)
SSOP64-P-525-0.80-K
Mirror finish
5
Notes for Mounting the Surface Mount Type Package
Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised
Epoxy resin 42 alloy Solder plating (5m) 1.34 TYP. 3/Dec. 5, 1996
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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REVISION HISTORY
Document No.
FEDL9208-02
Date
Feb. 23, 2004
Page Previous Current Edition Edition
- - Final edition 1
Description
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NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd.
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